Refactoring

This commit is contained in:
André R. Brodtkorb
2018-10-31 10:45:48 +01:00
parent e434b4e02a
commit 71777dad4e
9 changed files with 136 additions and 84 deletions

View File

@@ -69,8 +69,15 @@ class HLL2 (Simulator.BaseSimulator):
#Get kernels
self.kernel = context.get_prepared_kernel("cuda/SWE_HLL2.cu", "HLL2Kernel", \
"iifffffiPiPiPiPiPiPi", \
BLOCK_WIDTH=self.local_size[0], \
BLOCK_HEIGHT=self.local_size[1])
defines={
'BLOCK_WIDTH': self.block_size[0],
'BLOCK_HEIGHT': self.block_size[1]
}, \
compile_args={
'no_extern_c': True,
'options': ["--use_fast_math"],
}, \
jit_compile_args={})
#Create data by uploading to device
self.u0 = Common.ArakawaA2D(self.stream, \
@@ -89,7 +96,7 @@ class HLL2 (Simulator.BaseSimulator):
return self.stepDimsplitXY(dt)
def stepDimsplitXY(self, dt):
self.kernel.prepared_async_call(self.global_size, self.local_size, self.stream, \
self.kernel.prepared_async_call(self.grid_size, self.block_size, self.stream, \
self.nx, self.ny, \
self.dx, self.dy, dt, \
self.g, \
@@ -105,7 +112,7 @@ class HLL2 (Simulator.BaseSimulator):
self.t += dt
def stepDimsplitYX(self, dt):
self.kernel.prepared_async_call(self.global_size, self.local_size, self.stream, \
self.kernel.prepared_async_call(self.grid_size, self.block_size, self.stream, \
self.nx, self.ny, \
self.dx, self.dy, dt, \
self.g, \